Dr. Papadatos is a Sr. Science Advisor and Patent Agent in the Business Law department at Goodwin, where he has been a valued member of the Intellectual Property practice since 2020.
Dr. Papadatos specializes in both domestic and international intellectual property portfolio strategy, including the preparation and prosecution of patent applications, drafting opinions on patent validity and infringement, and conducting patentability and freedom-to-operate analyses. His expertise spans a diverse range of technological fields, such as semiconductor and microelectronics manufacturing processes, material science and thin-film processing, mechanical engineering, computer software, data processing, artificial intelligence, machine learning, data analytics, and energy.
Areas of Practice
Professional Experience
- Drafting and prosecuting patent applications across a wide array of technical fields, including semiconductor materials, material science, sensor technology, mobile advertising, data encryption, machine learning, artificial intelligence, data processing, robotics, telecommunications, and more.
- Conducting comprehensive freedom-to-operate, patentability, validity, and infringement analyses.
Before joining Goodwin, Dr. Papadatos served as a Technical Specialist and Patent Agent at Sterne Kessler Goldstein and Fox LLP in Washington, DC. Prior to his role as a Patent Agent, he spent a decade in the semiconductor industry, working as a development engineer at IBM and later as an integration engineer and manager at Samsung Austin Semiconductor. Dr. Papadatos is a co-inventor of several U.S. patents and has authored or co-authored numerous scientific articles.
Credentials
Education
PhD2006
State University of New York, University at Albany
MS2002
State University of New York, University at Albany
BSPhysics2000
University of Ioannina, Greece
Admissions
Bars
- U.S. Patent and Trademark Office (USPTO)
Publications
- Filippos Papadatos, Keith Wong, Valli Arunachalam, Chung Hwan Shin, Zhengwen Li, Michael Chudzik, Woo-Hyeong Lee, Aimin Xing: Low resistivity tungsten for 32 nm node MOL contacts and beyond, in Microelectronic Engineering 92 (2012) 123-125.
- Doug H. Lee, Valli Arunachalam, Filippos Papadatos, Hao Zhang, Zhengwen Li, Keith Wong, Woo-Hyeong Lee, Shurong Liang, Michael Chudzik, David Brown, Dan Mocuta, Doug Bonser, John Pellerin: Advanced Metallization Developments for 32-nm node CMOS Technology Contact Architecture, Materials Research Society, in Advanced Metallization Conference (AMC), Volume V-25, 2009.
- Valli Arunachalam, Filippos Papadatos, Hao Zhang, Keith Wong, Zhengwen Li, Chung Hwan Shin: ALD TiN for Contact Metallization: Correlation between Material and Barrier properties, American Vacuum Society (AVS), in: 9th International Conference on Atomic Layer Deposition, 2009.
- Keith Wong, Filippos Papadatos, Zhengwen Li,Hao Zhang,Valli Arunachalam, Doug Lee,Stephan Grunow: Extendibility of W Technology for 32nm CA Contact Schemes with Innovative Process Improvements, Materials Research Society, in Advanced Metallization Conference (AMC), Volume V-24, 2008.
- Filippos Papadatos, Steven Consiglio, Spyridon Skordas, Eric T. Eisenbraun, Alain E. Kaloyeros: A study of Ru ultra-thin film nucleation on pretreated SiO2 and Hf–silicate dielectric surfaces, Materials Research Society, in Journal of Materials Research, Vol. 22, No. 8, 2007.
- S. Consiglio, F. Papadatos, S. Naczas, S. Skordas, E. T. Eisenbraun, and A. E. Kaloyeros: MOCVD of hafnium silicate thin films using a dual source dimethyl-alkylamido approach, The Electrochemical Society, in Journal of The Electrochemical Society, 153, 2006.
- S. Skordas, F. Papadatos, S. Consiglio, E. T. Eisenbraun, E. Gousev, and A. E. Kaloyeros: Electrical properties of ultra-thin Al2O3 films grown by MOCVD for adv. CMOS gate dielectric applications, Materials Research Society, in Journal of Materials Research, Vol. 20, No .6, 2005.
- F. Papadatos, S. Consiglio, S. Skordas, E. Eisenbraun, A. Kaloyeros, J. Peck, D. Thompson, C. Hoover: CVD of ruthenium and ruthenium oxide thin films for advanced CMOS gate electrode applications, Materials Research Society, in Journal of Materials Research, Vol. 19, No. 10, 2004.
- C. Hoover, M. Litwin, J. Peck, G. Piotrowski, D. Thompson, E. Eisenbraun, F. Papadatos: Advanced ruthenium precursors for thin film deposition, Electrochemical Society (ECS), in Electrochemical Society (ECS), Vol. 22, 2003.
- Filippos Papadatos, Steve Consiglio, Alain E. Kaloyeros, Eric T. Eisenbraun: Integration studies of MOCVD-grown Ru & RuO2 with HfO2-based dielectrics for adv. CMOS applications, SRC, in Proceedings of SRC TECHCON conference, 2003.
- S. Skordas, F. Papadatos, G. Nuesca, J. J. Sullivan, E. T. Eisenbraun, A. E. Kaloyeros: Low Temperature MOCVD of Al2O3 for advanced CMOS gate dielectric applications, Materials Research Society, in Journal of Materials Research, Vol. 18, No. 8, 2003.
- Spyridon Skordas, Filippos Papadatos, Steven Consiglio, Eric T. Eisenbraun, Alain E. Kaloyeros: Interface quality and performance of low-temp. MOCVD Al2O3 thin films for adv. CMOS gate dielectric appl., Materials Research Society, in Mat. Res. Soc. Proc, Vol. 745, 2003.
- Filippos Papadatos, Spyridon Skordas, Steve Consiglio, Alain E. Kaloyeros, and Eric Eisenbraun: Characterization of Ru and RuO2 Thin Films deposited by CVD for CMOS Gate Electrode Applications, Materials Research Society, in Mat. Res. Soc. Proc, Vol. 745, 2003.
- F. Papadatos, S. Skordas, Z. Patel, S. Consiglio, and E. Eisenbraun: Chemical Vapor Deposition of Ru and RuO2 for Gate Electrode applications, Materials Research Society, in Mat. Res. Soc. Proc, Vol. 716, 2002.
- S. Skordas, F. Papadatos, Z. Patel, G. Nuesca, E. Eisenbraun, E. Gusev, and A. E. Kaloyeros: Low temp. MOCVD of Al2O3 thin films for advanced CMOS gate dielectric applications, Materials Research Society, in Mat. Res. Soc. Proc, Vol. 716, 2002.
- J. Peck,C. Hoover,J. Atwood,D. Hoth,S. Consiglio, F. Papadatos, E. Eisenbraun, A. Kaloyeros: Chemical Vapor Deposition of novel precursors for advanced Capacitor electrodes, ECS, in Electrochemical Society (ECS) Proceedings, 2002.
Patents
- US9735268, US9559202, US9425309, US9006801 — Method for forming metal semiconductor alloys in contact holes and trenches.
- US9252050, US9230857 — Method to improve semiconductor surfaces and polishing.
- US8614107, US8614106 — Liner-free tungsten contact.
- US8552502, US8232148, WO2011109203A3 — Structure and method to make replacement metal gate and contact metal.
- US7993987 — Surface cleaning using sacrificial getter layer.
- WO2015055080A1 — Surface treatment in a dep-etch-dep process.